Principle 1: The PCB clock frequency exceeds 5MHZ or the signal rise time is less than 5ns. A multi-layer board design is generally required. Reason: The signal loop area of the multi-layer board design can be well controlled.
Principle 2: For multi-layer boards, the key wiring layers (clock lines, bus lines, interface signal lines, RF lines, reset signal lines, chip select signal lines, and various control signal lines, etc.) should be adjacent to the complete plane. Preferably between the two ground planes. Reason: The key signal lines are generally strong radiation or extremely sensitive signal lines. The wiring near the ground plane can reduce the signal loop area, reduce its radiation intensity or improve the anti-interference ability.
Principle 3: For single-layer boards, both sides of the key signal lines should be packaged; Reason: The key signals are wrapped on both sides, which can reduce the signal loop area and prevent crosstalk between the signal lines and other signal lines.
Principle 4: For the double-layer board, the projection plane of the key signal line has a large area of paving, or the same as the single panel. Reason: the same as the multi-layer board key signal is close to the ground plane
Principle 5: In a multi-layer board, the power plane should be retracted by 5H-20H (H is the distance between the power supply and the ground plane) relative to its adjacent ground plane. Cause: The power plane is retracted relative to its return ground plane to effectively suppress edge radiation problems.
Principle 6: The projection plane of the wiring layer should be in the area of its reflow planar layer. Cause: If the wiring layer is not in the projected area of the reflow plane layer, it will cause edge radiation problems and cause an increase in the signal loop area, resulting in an increase in differential mode radiation.
Principle 7: In the multi-layer board, the TOP and BOTTOM layers of the board should have no signal lines larger than 50 MHz. The reason is that it is better to move the high-frequency signal between the two plane layers to suppress the radiation to the space.
Principle 8: For a board with a board-level operating frequency greater than 50MHz, if the second layer and the penultimate layer are wiring layers, the TOP and BOOTTOM layers should be grounded with copper foil. Reason: It is best to move the high frequency signal between two planar layers to suppress its radiation to the space.
Principle 9: In a multi-layer board, the main working power plane of the board (the most widely used power plane) should be in close proximity to its ground plane. Cause: The power plane and the ground plane are adjacent to each other to effectively reduce the power circuit loop area.
Principle 10: In a single-layer board, there must be a ground line near the power supply line and its parallel and parallel lines. Cause: Reduce the power supply loop area.
Principle 11: In the double-layer board, there must be a ground line near the power supply line and its parallel and parallel lines. Cause: Reduce the power supply loop area.
Principle 12: When designing a layer, try to avoid the adjacent layout of the wiring layer. If it is unavoidable that the wiring layers are adjacent, the layer spacing between the two wiring layers should be appropriately widened to reduce the layer spacing between the wiring layer and its signal loop. Cause: Parallel signal traces on adjacent wiring layers can cause signal crosstalk.
Principle 13: Adjacent plane layers should avoid overlapping their projection planes. Cause: When the projections overlap, the coupling capacitance between the layers causes the noise between the layers to couple with each other.
Principle 14: When designing the PCB layout, the design principle along the signal flow direction should be fully observed, and the back and forth should be avoided as much as possible. Cause: Avoid direct signal coupling and affect signal quality.
Principle 15: When multiple module circuits are placed on the same PCB, digital circuits and analog circuits, high-speed and low-speed circuits should be laid out separately. Cause: Avoid mutual interference between digital circuits, analog circuits, high-speed circuits, and low-speed circuits.
Principle 16: When high, medium, and low speed circuits are present on the circuit board, the high and medium speed circuits should be kept away from the interface. Cause: Avoid high frequency circuit noise radiating outward through the interface.
Principle 17: Energy storage and high-frequency filter capacitors should be placed near unit circuits or devices with large current variations (such as power supply modules: input and output terminals, fans, and relays). Cause: The presence of a storage capacitor can reduce the loop area of the high current loop.
Principle 18: The filter circuit of the board's power input should be placed close to the interface. Cause: Avoid that the filtered line is recoupled.
Principle 19: On the PCB, the filtering, protection, and isolation of the interface circuitry should be placed close to the interface. Cause: The effects of protection, filtering, and isolation can be effectively achieved.
Principle 20: If there are both filtering and protection circuits at the interface, the principle of first protection and filtering should be followed. Cause: The protection circuit is used for external overvoltage and overcurrent suppression. If the protection circuit is placed behind the filter circuit, the filter circuit will be damaged by overvoltage and overcurrent.
Principle 21: Ensure that the filter circuit (filter), isolation, and the input and output lines of the protection circuit are not coupled to each other during layout. Cause: The input and output traces of the above circuit will weaken the filtering, isolation or protection effect when they are coupled to each other.
Principle 22: If the interface is “clean” on the board, the filtering and isolation devices should be placed on the isolation strip between “clean” and the working ground. Cause: Avoid filtering or isolating devices that are coupled to each other through plane layers, weakening the effect.
Principle 23: “Clean”, except for filtering and guarding devices, cannot be placed on any other device, for the reason that the “clean” design is designed to ensure minimal interface radiation and is “cleanly” susceptible to external interference coupling. Therefore, there should be no other unrelated circuits and devices on the "clean" side.
Principle 24: Strong radiation devices such as crystals, crystals, relays, and switching power supplies are at least 1000 mils away from the single-board interface connectors. Cause: The interference will radiate directly or out of the outgoing cable to radiate outward.
Principle 25: Sensitive circuits or devices (such as reset circuits, WATCHDOG circuits, etc.) are at least 1000 mil away from each edge of the board, especially on the side edge of the board interface. Cause: Similar to the board interface and other places are the most easily interfered by external interference (such as static electricity), and sensitive circuits such as reset circuit and watchdog circuit can easily cause system misoperation.
Principle 26: The filter capacitors for IC filtering should be placed as close as possible to the power supply pins of the chip. Cause: The closer the capacitor is to the pin, the smaller the area of the high-frequency circuit, and the smaller the radiation.
Principle 27: For the series-connected resistor at the beginning, it should be placed close to its signal output. Reason: The design of the series matching resistor at the beginning is to add the impedance of the output of the chip to the impedance of the series resistor equal to the characteristic impedance of the trace. The matching resistor is placed at the end and cannot satisfy the above equation.
Principle 28: PCB traces must not have right or sharp corners. Cause: A right-angled trace causes the impedance to be discontinuous, causing the signal to emit, resulting in ringing or overshoot, creating strong EMI emissions.
Principle 29: Avoid layering of adjacent wiring layers as much as possible. When it is unavoidable, try to make the traces in the two wiring layers perpendicular or parallel to each other with a length of less than 1000 mil. Cause: Reduce crosstalk between parallel traces.
Principle 30: If the board has an internal signal trace layer, key signal lines such as clocks are placed on the inner layer (prioritizing the preferred wiring layer). Cause: The key signal can be shielded by laying it on the internal trace layer.
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